1. Field of the Invention
The present invention relates to a structure for mounting a semiconductor device onto a mounting board such as a multilayer printed circuit board, and more specifically to a mounting structure of flip-chip construction for mounting a semiconductor chip using metal bumps.
2. Description of Related Art
In flip-chip connection structures in the past, metallic bumps such as solder bumps were generally used, a small solder piece being applied to the electrode pads on one side of the semiconductor device and the multilayer printed circuit board, solder being applied thereto by printing the solder, and causing the solder to melt, the surface tension thereof forming a spherically shaped solder bump.
Then, the electrode pads of the multilayer printed circuit board and semiconductor device which are in opposition to the thus formed solder bumps are superposed thereover and aligned therewith, reflow or other thermal processing is then used to melt the solder bumps and make connections to opposing electrode pads.
FIG. 4 shows an example of the cross section of the above-noted arrangement. In this drawing, a first electrode pad 2 is formed around the periphery of a semiconductor device 1, a second electrode pad 9 is formed on the surface of the multilayer printed circuit board 8, for the purpose of mounting this semiconductor device 1 which is formed of Al203 or the like, and a metal bump 14 made of solder is used to make a joining therebetween.
However, in a connection structure such as this which uses a solder bump a problem arises in that with the application of thermal hysteresis causes heat stress to develop at the bump connection part due to a difference in thermal expansion between the semiconductor device 1 and the multilayer printed circuit board 8, and as the size of the semiconductor device grows large, this thermal stress becomes large, leading to destruction of the bump connection part due to fatigue.
Because of the above-noted problem, there was a connection structure proposed in Japanese Unexamined Patent Publication (KOKAI) No. 6-291165, this being shown in FIG. 5.
This structure is formed by a first electrode pad 2 which is provided on the semiconductor device 1, a second electrode pad 9 which is provided on a multilayer printed circuit board 8, and an insulating film 30 which intervenes between the above-noted first and second electrode pad 2 and 9, bumps 14 making connection of their respective first and second electrode pads 2 and 9 with via the insulating film 30.
This insulating film 30 has an electrode pads 31 on its front and reverse sides at positions which are not mutually opposite, these electrode pads 31 on the insulating film 30 being electrically connected by means of the through holes 32 and lead wires 33.
The first electrode pad 2 of the semiconductor device 1 and the electrode pad 31 on the front surface of the insulating film 30 are connected by means of the solder bump 14, while the second electrode pad 9 of the multilayer printed circuit board 8 and the electrode pad 31 on the reverse side of the insulating film 30 are connected by the solder bump 14.
In addition, to achieve the desired spacing between the semiconductor device 1 and the insulating film 30, a standoff element 34 made of a material such as Al, AlN, or SiC is formed by punching or pressing, this standoff element 34 being attached onto the semiconductor device 1 and the insulating film 30 by means of a heat-resistant adhesive 35.
In the structure that is disclosed in this Japanese Unexamined Patent Publication, between the semiconductor device 1 and the multilayer printed circuit board 8, insulating film 30 intervenes and is shifted so that the electrode pads 31 on the front and reverse sides are not opposite one another, so that it is possible to absorb in the insulating film 30 the thermal stress that occurs because of the difference in thermal expansion between the semiconductor device 1 and the multilayer printed circuit board 8.
Also, because the electrode pads 31 on the front and reverse sides of the insulating film 30 are not opposite to one another, by positioning the electrode pad 9 on the printed circuit board side further inside than the position of the electrode pad 2 of the semiconductor device 1, it is possible to make the solder bump connection area on the printed circuit board 8 small, thereby reducing the strain caused by thermal stress.
However, in the above-noted disclosed structure, the connection structure using solder bumps 14 is a double-layer structure on both sides of the insulating film 30, this requiring two times the number of solder bumps as there are connection locations, which is not desirable from the standpoint of flip-chip productivity and economy.
Also, there are standoff elements 34 with good thermal conductivity that are not electrically connected to the electrically connected solder bump 14 provided between the semiconductor device 1 and the insulating film 30, the region in which these standoff elements and solder bumps do not exist being open space.
Because the insulating film 30 is a thin layer of several tens of .mu.m to several hundreds of .mu.m and does not have rigidity, it is difficult to achieve a uniform flatness in the insulating film 30 between this open space area and the region in which the standoff elements and metal bumps exist, so that when mounting the semiconductor device 1 and the insulating film 30 to the surface of a multilayer printed circuit board 8, there are cases in which mutual connection is not possible at a solder bump 14 between the insulating film 30 and the multilayer printed circuit board 8, causing a reduction in reliability.
In view of the above-noted problems, an object of the present invention is to provide a mounting structure which alleviates the thermal stress which is due to a difference in thermal expansion between a semiconductor device and a mounting board such as multilayer printed circuit board, while avoiding complexity of structure and achieving high connection reliability.